1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, it relates to a power semiconductor device having a protective function.
2. Description of the Background Art
FIG. 8 is a block diagram showing the structure of an inverter module 90 having a three-phase bridge circuit. As shown in FIG. 8, sets of transistors 11 and 12, transistors 21 and 22 and transistors 31 and 32 which are power devices such as IGBTs (insulated gate bipolar transistors) are totem-pole connected between terminals P and N, i.e. a high-potential side main power supply terminal P and a low-potential side main power supply terminal N. The main power supply terminals P and N are connected to positive and negative electrodes of a dc power source PS respectively.
Nodes 161, 162 and 163 between the totem-pole connected transistors 11 and 12, 21 and 22 and 31 and 32 are connected to output terminals U, V and W of U-, V- and W-phases respectively.
Freewheel diodes 111, 121, 211, 221, 311 and 321 are connected in antiparallel with the transistors 11, 12, 21, 22, 31 and 32 respectively.
Packaged control circuits IC1, IC2 and IC3 are arranged for controlling the sets of the transistors 11 and 12, 21 and 22 and 31 and 32 respectively. The control circuits IC1 to IC3, which are functionally identical to each other, are shown with different reference numerals for the purpose of convenience.
Control signal output terminals HO and NO of the control circuit IC1 supply control signals to gate electrodes of the transistors 11 and 12 respectively, control signal output terminals HO and LO of the control circuit IC2 supply control signals to gate electrodes of the transistors 21 and 22 respectively, and control signal output terminals HO and LO of the control circuit IC3 supply control signals to gate electrodes of the transistors 31 and 32 respectively.
Standard potential terminals VS of the control circuits IC1 to IC3 are connected to the nodes 161, 162 and 163 respectively as well as to standard potential terminals VUFS, VVFS and VWFS of the packages respectively.
Further, standard potential terminals VNO of the control circuits IC1 to IC3 are connected to the low-potential side main power supply terminal N in common, while driving voltage terminals VB of the control circuits IC1 to IC3 are connected to driving voltage terminals VUFB, VVFB and VWFB of the packages respectively.
Each standard potential terminal VS supplies a high-potential side reference potential to each control circuit, and each standard potential terminal VNO supplies a low-potential side reference potential to each control circuit.
The control circuits IC1 to IC3 have driving voltage terminals VCC, ground terminals COM, control signal input terminals PIN and NIN and fault terminals FO. The control circuits IC1 to IC3 further have current detection terminals CIN1, CIN2 and CIN3 respectively. The current detection terminals CIN1 to CIN3 are functionally identical to each other.
The driving voltage terminals VCC of the control circuits IC1 to IC3 are connected to driving voltage terminals VNI of the module 90, while the ground terminals COM are connected to a ground terminal VNC of the module 90.
The control signal input terminals PIN of the control circuits IC1 to IC3 are connected to control signal input terminals UP, VP and WP of the module 90 respectively, while the control signal input terminals NIN are connected to control signal input terminals UN, VN and WN of the module 90 respectively.
The fault terminals FO of the control circuits IC1 to IC3 are connected with each other in the module 90, and connected to a fault terminal FO of the module 90 in common.
The current detection terminal CIN3 of the control circuit IC3 is connected to a current detection circuit CIN of the module 90, and connected to the current detection terminals CIN1 and CIN2 in the module 90.
The ground terminal VNC and the current detection terminal CIN of the module 90 are connected to both ends of a shunt resistor R20 detecting a direct current flowing across the main power supply terminals P and N in the exterior of the module 90, for detecting the voltage of the shunt resistor R20.
The structure for detecting the voltage with the current detection terminals CIN1 to CIN3 is now described with reference to FIG. 9. While FIG. 9 illustrates the current detection terminal CIN1, this structure also applies to the current detection terminals CIN2 and CIN3.
Referring to FIG. 9, the voltage of the shunt resistor R20 detected by the current detection terminal CIN1 is input in a comparator C, which in turn compares this voltage with a reference voltage REF. If the voltage of the shunt resistor R20 is in excess of the reference voltage REF, the voltage is supplied through a latch circuit C2 to a fault circuit C3, which in turn supplies an instruction for stopping operation of the transistors 11 and 12 to a power device driving circuit (not shown) provided in the control circuit IC1. The fault terminal FO outputs the aforementioned instruction.
The inverter module 90 having the aforementioned structure performs dc-ac conversion by alternately driving the transistors 11, 12, 21, 22, 31 and 32 for supplying ac power to a load (not shown).
When an abnormal current flows across the terminals P and N due to abnormal operation of the transistors 11, 12, 21, 22, 31 and 32 or the like in the inverter module 90, the shunt resistor R20 exhibits an abnormal voltage. The current detection terminals CIN1, CIN2 and CIN3 of the control circuits IC1 to IC3 detect this abnormal voltage and the control circuits IC1 to IC3 stop the control signals to the transistors 11, 12, 21, 22, 31 and 32 respectively, thereby protecting the transistors 11, 12, 21, 22, 31 and 32.
Thus, the module 90 requires wires (internal wires) therein for supplying the voltage of the shunt resistor R20 to all control circuits IC1 to IC3. Consequently, the internal wires are so disadvantageously complicated that the module 90 cannot be miniaturized.
According to a first aspect of the present invention, a semiconductor device comprises at least one set of complementarily operating first and second switching elements serially interposed between first and second main power supply terminals supplied with a dc voltage, at least one control circuit driving/controlling the set of first and second switching elements and a shunt resistor detecting a current flowing across the first and second main power supply terminals, while the control circuit comprises at least one current detection circuit detecting a voltage generated by a current flowing to the shunt resistor and outputting a current abnormality signal indicating current abnormality when the detected voltage is in excess of a prescribed level and a fault circuit receiving the current abnormality signal output from the current detection circuit and outputting a stop signal for stopping operation of at least one of the first and second switching elements, and the fault circuit has a function of outputting the stop signal to the exterior of the control circuit while stopping operation of at least one of the first and second switching elements also by a signal, identical to the stop signal, input from the exterior of the control circuit.
In the semiconductor device according to the first aspect, the fault circuit has the function of outputting the stop signal to the exterior of at least one control circuit and receiving the signal identical to the stop signal input from the exterior of at least one control circuit for stopping the operation of at least one of the first and second switching elements. Therefore, when at least one set of first and second switching elements are shorted to cause current abnormality across the first and terminals, for example, remaining switching elements, for example, can be stopped at timing for stopping at least one set of first and second switching elements by at least one control circuit, thereby matching the timing for stopping the switching elements.
According to a second aspect of the present invention, the control circuit further comprises a voltage detection circuit detecting a driving voltage supplied to the control circuit and outputting a voltage reduction signal indicating voltage reduction when the driving voltage is below a prescribed level, and the fault circuit outputs the stop signal when at least one of the voltage reduction signal and the current abnormality signal is output.
In the semiconductor device according to the second aspect, the fault circuit outputs the stop signal when at least either the voltage reduction signal or the current abnormality signal is output, whereby the operation of at least one of the first and second switching elements can be stopped not only in current abnormality across the first and second terminals but also in reduction of the driving voltage.
According to a third aspect of the present invention, the driving voltage is supplied to a control electrode of a low-potential side one of the first and second switching elements also as a control voltage.
In the semiconductor device according to the third aspect, reduction of the driving voltage supplied to the control electrode of the low-potential side one of at least one set of first and second switching elements also as a control voltage is so detected that no level shifting or the like is required but the semiconductor device is easy to handle.
According to a fourth aspect of the present invention, the current detection circuit includes first and second current detection circuits, and the first current detection circuit is set higher in detection sensitivity than the second current detection circuit.
In the semiconductor device according to the fourth aspect, the first current detection circuit is set higher in detection sensitivity than the second current detection circuit, whereby the first and second current detection circuits can be so selectively used that a control circuit for preferentially detecting the voltage of the shunt resistor can be set when a plurality of control circuits are present, for example, and the switching element(s) controlled by the remaining control circuit(s) can be stop-controlled by the stop signal output from a single control circuit.
According to a fifth aspect of the present invention, the semiconductor device comprises a plurality of control circuits and comprises a plurality of sets of first and second switching elements in correspondence to the plurality of control circuits respectively, while only one of the plurality of control circuits detects the voltage of the shunt resistor, outputs the stop signal and supplies the same to the fault circuit of the remaining control circuit.
In the semiconductor device according to the fifth aspect, only one of the plurality of control circuits outputs the stop signal by detecting the voltage of the shunt resistor and supplies the same to the fault circuit(s) of the remaining control circuit(s), whereby the switching element(s) controlled by the remaining control circuit(s) can be stop-controlled by the stop signal output from a single control circuit while only wires for electrically connecting the fault circuits of the plurality of control circuits with each other are required and hence the semiconductor device can be miniaturized by reducing the number of the wires.
According to a sixth aspect of the present invention, the semiconductor device comprises a plurality of control circuits and comprises a plurality of sets of first and second switching elements in correspondence to the plurality of control circuits respectively, while only one of the plurality of control circuits detects the voltage of the shunt resistor by the first current detection circuit while the remaining control circuit is electrically connected to the shunt resistor to detect the voltage of the shunt resistor by the second current detection circuit.
In the semiconductor device according to the sixth aspect, only one of the plurality of control circuits detects the voltage of the shunt resistor by the first current detection circuit while the remaining control circuit detects the voltage of the shunt resistor by the second current detection circuit, whereby a control circuit preferentially detecting the voltage of the shunt resistor can be set and the timing for stopping the switching elements can be matched by stop-controlling the switching element(s) controlled by the remaining control circuit(s) with the stop signal output from a single control circuit.
An object of the present invention is to simplify internal wires in an inverter module having a function of protecting a power device for miniaturizing the module.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.